Design of Half-Subtractor Using 120nm CMOS Technology DOI: 10.26666/rmp.jesr.2023.7.6
Mohd Iskandar Dzulkarnain RUMMAJA, Muhammad Idzdihar IDRIS, Ahmad Muhajer ABDUL AZIZ, Zul Atfyi Fauzan MOHAMMED NAPIAH, Zarina BAHARUDIN ZAMANI , Radi Husin RAMLEE, Khairul Muzammil SAIPULLAH